Dependability is Measured with Soft Error Caused Exceptions on the Arm Cortex-A9 CPU

Zaidoon Khalaf Mahmood
International Journal of Computational and Electronic Aspects in Engineering
Volume 4: Issue 4, October 2023, pp 100-109

Author's Information
Zaidoon Khalaf Mahmood  
Corresponding Author
University of Kirkuk, Kirkuk, Iraq
zaidoon.kh.mahmood@uokirkuk.edu.iq
Article -- Peer Reviewed
First online on – 12 October 2023

Open Access article under Creative Commons License

Cite this article –Zaidoon Khalaf Mahmood, “Dependability is Measured with Soft Error Caused Exceptions on the Arm Cortex-A9 CPU”, International Journal of Computational and Electronic Aspects in Engineering, RAME Publishers, vol. 4, Issue 4, pp. 100-109, 2023.
https://doi.org/10.26706/ijceae.4.4.20231002

Abstract:-
In embedded systems, ARM processors are the market leaders, offering high-performance computation, low power consumption, and low cost. As a result, there is a lot of excitement about its potential in the aerospace business. The Xilinx Zynq-7000 FPGA features dual-core ARM Cortex-A9 hard-core processors. are protected from soft failures thanks to a lockstep technique described in this study. The lockstep is an error detection and righting system that is based on both hardware and software. At the software level, it uses checkpoints and rollback methods. On the hardware level, checker circuits and processor replication are also included. The proposed method demonstrates how to execute the plan successfully in two core processors to improve system stability in radiation environments. The results reveal a link between the size of the application and the checkpoint and rollback strategies in terms of usability overhead. as well as a dependence on the number of checkpoints.
Index Terms:-
ARM, embedded processors reliability, Exceptions, Radiation effects, Fault injection
REFERENCES
  1. X. Xiong, X. Du, B. Zheng, Z. Chen, W. Jiang, S. He, et al., "Electronics, vol. 11, p. 3844, 2022.
    Crossref
  2. A. Ahmed and H. Demirel, "FPAA based on Floating Current Source Analog system design," Design Engineering, pp. 10953-10969, 2021.
    Crossref
  3. M. A. Ahmed, M. Z. Khalaf, and D. Hüseyin, "Study of finfet transistor. Critical and literature review in finfet transistor in the active filter," 3 c TIC: cuadernos de desarrollo aplicados a las TIC, vol. 12, pp. 65-81, 2023.
    Crossref
  4. M. Alisawi, A. Al-Dawoodi, Y. M. Wahab, L. Hammood, A. Y. Nawaf, and A. Ghazi, "Developing the Real Estate Rental Sector in Third World Countries Using Blockchain Technology: Iraq as Case Study," in Blockchain Technologies for Sustainable Development in Smart Cities, ed: IGI Global, 2022, pp. 87-109.
    Crossref
  5. P. Bodmann, G. Papadimitriou, D. Gizopoulos, and P. Rech, "The impact of soc integration and os deployment on the reliability of arm processors," in 2021 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2021, pp. 223-225.
    Crossref
  6. A. Chatzidimitriou, P. Bodmann, G. Papadimitriou, D. Gizopoulos, and P. Rech, "Demystifying soft error assessment strategies on arm cpus: Microarchitectural fault injection vs. neutron beam experiments," in 2019 49th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), 2019, pp. 26-38.
    Crossref
  7. Á. B. de Oliveira, G. S. Rodrigues, and F. L. Kastensmidt, "Analyzing lockstep dual-core ARM cortex-A9 soft error mitigation in FreeRTOS applications," in Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017, pp. 84-89.
    Crossref
  8. X. Du, D. Luo, K. Shi, C. He, and S. Liu, "FFI4SoC: a fine-grained fault injection framework for assessing reliability against soft error in SoC," Journal of Electronic Testing, vol. 34, pp. 15-25, 2018.
    Crossref
  9. A. Chatzidimitriou, M. Kaliorakis, D. Gizopoulos, M. Iacaruso, M. Pipponzi, R. Mariani, et al., "Rt level vs. microarchitecture-level reliability assessment: Case study on arm (r) cortex (r)-a9 cpu," in 2017 47th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W), 2017, pp. 117-120.
    Crossref
  10. A. Vallero, A. Savino, A. Chatzidimitriou, M. Kaliorakis, M. Kooli, M. Riera, et al., "Syra: Early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems," IEEE Transactions on Computers, vol. 68, pp. 765-783, 2018.
    Crossref
  11. L. G. Casagrande and F. L. Kastensmidt, "Soft error analysis in embedded software developed with & without operating system," in 2016 17th Latin-American Test Symposium (LATS), 2016, pp. 147-152.
    Crossref
  12. T. Liu, Y. Fu, Y. Zhang, and B. Shi, "A Hierarchical Assessment Strategy on Soft Error Propagation in Deep Learning Controller," in Proceedings of the 26th Asia and South Pacific Design Automation Conference, 2021, pp. 878-884.
    Crossref
  13. G. Abich, J. Gava, R. Garibotti, R. Reis, and L. Ost, "Applying lightweight soft error mitigation techniques to embedded mixed precision deep neural networks," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 68, pp. 4772-4782, 2021.
    Crossref
  14. G. S. Rodrigues, F. Rosa, Á. B. de Oliveira, F. L. Kastensmidt, L. Ost, and R. Reis, "Analyzing the impact of fault-tolerance methods in arm processors under soft errors running linux and parallelization apis," IEEE Transactions on Nuclear Science, vol. 64, pp. 2196-2203, 2017.
    Crossref
  15. G. S. Rodrigues, Á. Barros de Oliveira, F. L. Kastensmidt, V. Pouget, and A. Bosio, "Assessing the reliability of successive approximate computing algorithms under fault injection," Journal of Electronic Testing, vol. 35, pp. 367-381, 2019.
    Crossref
  16. F. R. da Rosa, L. Ost, and R. Reis, Soft Error Reliability Using Virtual Platforms: Early Evaluation of Multicore Systems: Springer Nature, 2020.
    Crossref
  17. A. Chatzidimitriou, G. Papadimitriou, C. Gavanas, G. Katsoridas, and D. Gizopoulos, "Multi-bit upsets vulnerability analysis of modern microprocessors," in 2019 IEEE International Symposium on Workload Characterization (IISWC), 2019, pp. 119-130.
  18. A. Serrano-Cases, L. M. Reyneri, Y. Morilla, S. Cuenca-Asensi, and A. Martínez-Álvarez, "Empirical mathematical model of microprocessor sensitivity and early prediction to proton and neutron radiation-induced soft errors," IEEE Transactions on Nuclear Science, vol. 67, pp. 1511-1520, 2020.
    Crossref
  19. F. R. da Rosa, R. Garibotti, L. Ost, and R. Reis, "Using machine learning techniques to evaluate multicore soft error reliability," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 66, pp. 2151-2164, 2019.
    Crossref
  20. G. S. Rodrigues and F. L. Kastensmidt, "Evaluating the behavior of successive approximation algorithms under soft errors," in 2017 18th IEEE Latin American Test Symposium (LATS), 2017, pp. 1-6.
    Crossref
  21. B. Wibowo, A. Agrawal, and J. Tuck, "Characterizing the impact of soft errors across microarchitectural structures and implications for predictability," in 2017 IEEE International Symposium on Workload Characterization (IISWC), 2017, pp. 250-260.
    Crossref
  22. G. S. Rodrigues, F. Rosa, F. L. Kastensmidt, R. Reis, and L. Ost, "Investigating parallel TMR approaches and thread disposability in Linux," in 2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2017, pp. 393-396.
    Crossref
  23. Ó. R. Polo, J. Sánchez, A. da Silva, P. Parra, A. M. Hellín, A. Carrasco, et al., "Reliability-oriented design of on-board satellite boot software against single event effects," Journal of Systems Architecture, vol. 114, p. 101920, 2021.
    Crossref
  24. M. Peña-Fernandez, A. Lindoso, L. Entrena, M. García-Valderas, Y. Morilla, and P. Martín-Holgado, "Online error detection through trace infrastructure in ARM microprocessors," IEEE Transactions on Nuclear Science, vol. 66, pp. 1457-1464, 2019.
    Crossref
  25. Y. Shen and K. Elphinstone, "Microkernel mechanisms for improving the trustworthiness of commodity hardware," in 2015 11th European Dependable Computing Conference (EDCC), 2015, pp. 155-166.
    Crossref
  26. Z. Dai, Y. Fu, T. Liu, and H. You, "The Internal Fault Detection of Processor Based on Bayesian Network," in 2018 IEEE 9th International Conference on Software Engineering and Service Science (ICSESS), 2018, pp. 775-778.
    Crossref
  27. T. Xia, J.-C. Prévotet, and F. Nouvel, "Mini-nova: A lightweight arm-based virtualization microkernel supporting dynamic partial reconfiguration," in 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015, pp. 71-80.
    Crossref
  28. J. F. Martínez-Osuna, F. J. Ocampo-Torres, L. Gutiérrez-Loza, E. Valenzuela, A. Castro, R. Alcaraz, et al., "Coastal buoy data acquisition and telemetry system for monitoring oceanographic and meteorological variables in the Gulf of Mexico," Measurement, vol. 183, p. 109841, 2021.
    Crossref

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